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Exploiting analogue OxRAM conductance modulation for contrast enhancement application

Published in Electronics Letters, 2020

We propose a unique application of analogue oxide-based resistive memory (OxRAM) device for sensor-level information storage and computation. They show that quality of low-contrast images in low-light can be improved by carefully exploiting OxRAM conductance modulation from specific bi-layer OxRAM material stacks. The proposed methodology involves conversion of light intensity to pulse frequency followed by resistance encoding as different non-volatile OxRAM resistance states.

Recommended citation: A. Kumar, S. S. Bezugam, B. Hudec, T-H. Hou, and M. Suri. Electronics Letters 56, no. 12 (2020): 594-597 https://doi.org/10.1049/el.2020.0106

Efficient Video Summarization Framework using EEG and Eye-tracking Signals

Published in arXiv preprint (Under Review), 2021

This paper proposes an efficient video summarization framework that will give a gist of the entire video in a few key-frames or video skims. Existing video summarization frameworks are based on algorithms that utilize computer vision low-level feature extraction or high-level domain level extraction. However, being the ultimate user of the summarized video, humans remain the most neglected aspect. Therefore, the proposed paper considers human’s role in summarization and introduces human visual attention-based summarization techniques. To understand human attention behavior, we have designed and performed experiments with human participants using electroencephalogram (EEG) and eye-tracking technology. The EEG and eye-tracking data obtained from the experimentation are processed simultaneously and used to segment frames containing useful information from a considerable video volume. Thus, the frame segmentation primarily relies on the cognitive judgments of human beings. Using our approach, a video is summarized by 96.5% while maintaining higher precision and high recall factors. The comparison with the state-of-the-art techniques demonstrates that the proposed approach yields ceiling-level performance with reduced computational cost in summarising the videos.

Recommended citation: S. S. Bezugam, S. Majumdar, C. Ralekar, and T. K. Gandhi. arXiv preprint arXiv:2101.11249 (2021). (Under Review) https://arxiv.org/abs/2101.11249

Fully Unsupervised Spike-Rate-Dependent Plasticity Learning With Oxide Based Memory Devices

Published in IEEE Transactions on Electron Devices , 2021

Artificial synapses are fundamental building blocks for neuromorphic computing hardware. In this work, we demonstrate fully unsupervised neuromorphic learning using analog weight change properties of bilayer nonfilamentry oxide-based resistive memory (OxRAM) devices as synaptic elements. Essential functions of a biological synapse, such as potentiation, depression, and spike-rate-dependent plasticity (SRDP), are experimentally demonstrated. Furthermore, we show the tune-ability of SRDP with preneuron/postneuron spike-train parameters (frequency and amplitude). Through simulations, we show a two-layer fully connected neuromorphic network powered by SRDP and OxRAM synapses. Our network achieves state-of-the-art best classification accuracy results compared to the literature (for SRDP-based purely unsupervised spiking neural networks (SNNs), without the use of any convolutional layer) on full Modified National Institute of Standards and Technology (MNIST) dataset: 92.07% (training) and 90.76% (test). Detailed impact of device properties, such as variability, retention, and endurance, is analyzed. The impact of introducing sparsity during training and weight pruning during inference was also investigated.

Recommended citation: M. Kumar, S. S. Bezugam, S. Khan and M. Suri, "Fully Unsupervised Spike-Rate-Dependent Plasticity Learning With Oxide- Based Memory Devices," in IEEE Transactions on Electron Devices, vol. 68, no. 7, pp. 3346-3352, July 2021, doi: 10.1109/TED.2021.3077346. https://doi.org/10.1109/TED.2021.3077346

2D Histogram based Region Proposal (H2RP) Algorithm for Neuromorphic Vision Sensors

Published in International Conference on Neuromorphic Systems 2021 (ICONS 2021) , 2021

In this paper, we propose a novel approach called H2RP (2D Histogram based Region Proposal) for efficient region proposal on AER (Address Event Representation) data generated by commercial neuromorphic vision sensors on a stationary setup. The proposed H2RP technique is based upon 2D histogram event-count images. We show that proposed H2RP has low computational footprint and no memory overhead compared to other state of the art region proposal techniques for neuromorphic vision data. Proposed technique derives its high computational efficiency by eliminating explicit requirement of dedicated noise filtering. To validate the proposed technique we benchmark it on two different real world AER datasets generated from two different commercial event sensors. Datasets used for this study constitute the (i) DAVIS-traffic surveillance dataset, and (ii) specially recorded moving object dataset. Our pipeline including H2RP along with an overlap tracker/kalman filter shows a gain of ∼87× in terms of computational footprint compared to other state of the art algorithms. Further, we incorporate a light CNN for object recognition. We also evaluate the proposed pipeline on two different edge-hardware (Jetson Nano, Raspberry Pi 3B+) platforms.

Recommended citation: Medya, R., Bezugam, S.S., Bane, D. and Suri, M., 2021, July. 2D Histogram based Region Proposal (H2RP) Algorithm for Neuromorphic Vision Sensors. In International Conference on Neuromorphic Systems 2021 (pp. 1-6). , doi: 10.1145/3477145.3477263. https://doi.org/10.1145/3477145.3477263

An adaptive threshold neuron for recurrent spiking neural networks with nanodevice hardware implementation

Published in Nature Communications, 2021

We propose a Double EXponential Adaptive Threshold (DEXAT) neuron model that improves the performance of neuromorphic Recurrent Spiking Neural Networks (RSNNs) by providing faster convergence, higher accuracy and a flexible long short-term memory. We present a hardware efficient methodology to realize the DEXAT neurons using tightly coupled circuit-device interactions and experimentally demonstrate the DEXAT neuron block using oxide based non-filamentary resistive switching devices. Using experimentally extracted parameters we simulate a full RSNN that achieves a classification accuracy of 96.1% on SMNIST dataset and 91% on Google Speech Commands (GSC) dataset. We also demonstrate full end-to-end real-time inference for speech recognition using real fabricated resistive memory circuit based DEXAT neurons. Finally, we investigate the impact of nanodevice variability and endurance illustrating the robustness of DEXAT based RSNNs. Recurrent spiking neural networks have garnered interest due to their energy efficiency; however, they suffer from lower accuracy compared to conventional neural networks. Here, the authors present an alternative neuron model and its efficient hardware implementation, demonstrating high classification accuracy across a range of datasets.

Recommended citation: A. Shaban, S. S. Bezugam, and M. Suri. Nature Communications 12, no. 1 (2021): 1-11. https://www.nature.com/articles/s41467-021-24427-8

Neuromorphic Recurrent Spiking Neural Networks for EMG Gesture Classification and Low Power Implementation on Loihi

Published in 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 2023

In this work, we show an efficient Electromyograph (EMG) gesture recognition using Double Exponential Adaptive Threshold (DEXAT) neuron based Recurrent Spiking Neural Network (RSNN). Our network achieves a classification accuracy of 90% while using lesser number of neurons compared to the best reported prior art on Roshambo EMG dataset. Further, to illustrate the benefits of dedicated neuromorphic hardware, we show hardware implementation of DEXAT neuron using multicompartment methodology on Intel’s neuromorphic Loihi chip. RSNN implementation on Loihi (Nahuku 32) achieves significant energy/latency benefits of ~983X/19X compared to GPU for batch size = 50.

Recommended citation: S. S. Bezugam, A. Shaban, and M. Suri. arXiv preprint arXiv:2206.02061 (2022). 2023 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2023. https://doi.org/10.1109/ISCAS46773.2023.10181510

RRAM Based On-Sensor Visual Data Preprocessing for Efficient Image Classification

Published in 2023 Device Research Conference (DRC), 2023

This work presents a proof-of-concept application of a memristive-type oxide-based RRAM device for the on-sensor preprocessing of visual data. The proposed hybrid (CMOS-RRAM) sensor architecture improves the contrast quality of low-light low-contrast visual data, as an early visual task by carefully exploiting bilayer analogue RRAM’s conductance modulation. This work also investigates the impact of RRAM device’s conductance state variability on the contrast enhancement and shows negligible change in the results. An artificial neural network (ANN) of architecture 64×20×3 (with three different output classes) is built to perform the image classification and shows ∼ 74% better efficiency with RRAM based preprocessed data. The proposed hybrid sensor architecture and methodology is a step toward the development of advanced, intelligent visual systems of the next generation.

Recommended citation: A. Kumar, S. S. Bezugam. 2023 Device Research Conference (DRC). IEEE, 2023. https://doi.org/10.1109/DRC58590.2023.10186980

CMOS-PCM Based Artificial Thermosensory Neuron for Bio-Inspired Sensing

Published in 2023 IEEE 23rd International Conference on Nanotechnology (NANO), 2023

We propose a hybrid CMOS-PCM (Phase-Change Memory) based artificial thermosensory neuron with integrated synaptic module for neuromorphic sensing applications. We exploit the volatile Ovonic-Threshold-Switching (OTS) behaviour of a PCM cell for emulating the spiking neuronal activity. Thermally driven OTS voltage reduction trend of a PCM cell helps to modulate firing frequency of the proposed sensory neuron with increasing temperature. The proposed neuron circuit is capable of sensing a temperature range from 273K to 353 K. Furthermore, we propose a Spiking Neural Network (SNN) of size 784×196 × 10 for MNIST, Fashion-MNIST data based image classification, where gray-scale pixel values are considered as temperature profiles. The proposed SNN was trained with Back-Propagation (BP) algorithm for 100 epochs. We achieved maximum 99.21 % (/95.5%) train (/test) accuracy on MNIST dataset, whereas on Fashion-MNIST dataset, maximum train (/test) accuracy was 92.18% (/83.24%). Through network simulations, we also investigated the impact of resistance drift behavior of PCM synaptic devices on the proposed SNN application.

Recommended citation: M. Kumar, S. S. Bezugam, M. Kumar, and M. Suri. 2023 IEEE 23rd International Conference on Nanotechnology (NANO). IEEE, 2023. https://doi.org/10.1109/NANO58406.2023.10231240

ReRAM-Based NeoHebbian Synapses for Faster Training-Time-to-Accuracy Neuromorphic Hardware

Published in International Electron Devices Meeting (IEDM), 2023

This work demonstrates ReRAM-based NeoHebbian synapses for faster training-time-to-accuracy in neuromorphic hardware. System level simulations show that the online learning algorithm can reach state-of-the-art accuracy on phenome detection dataset.

Recommended citation: T. Bhattacharya*, S.S. Bezugam*, S. Pande*, E. Wlazlak, and D. Strukov. International Electron Devices Meeting (IEDM) (2023) (pp. 1-4) https://doi.org/10.1109/IEDM45741.2023.10413797

Spike frequency adaptation: bridging neural models and neuromorphic applications

Published in Communications Engineering, 2024

The human brain’s unparalleled efficiency in executing complex cognitive tasks stems from neurons communicating via short, intermittent bursts or spikes. Spike frequency adaptation (SFA) is a fundamental neuronal mechanism that enables the dynamic adjustment of spiking rates in response to input stimuli. This process is crucial for maintaining neural homeostasis, optimizing information encoding, and preventing overstimulation. In this perspective, we explore the adaptive neuron models in computational neuroscience, emphasizing their significance in the future development of power efficient artificial intelligence applications and hardware integration. We discuss the pivotal role of spike frequency adaptation in bridging the gap between biological realism and practical utility in neuromorphic systems, thereby offering a comprehensive understanding of its potential impact on the field.

Recommended citation: C. Ganguly*, S. S. Bezugam*, E. Abs, M. Payvand and M. Suri. Communications Engineering 3(1), 22, (2024). https://www.nature.com/articles/s44172-024-00165-9

Quantized Context Based LIF Neurons for Recurrent Spiking Neural Networks in 45nm

Published in Neuro-Inspired Computational Elements Conference 2024, 2024

In this study, we propose the first hardware implementation of a context-based recurrent spiking neural network (RSNN) using quantized context-based leaky integrate-and-fire (QCLIF) neurons. The QCLIF neuron model is designed to efficiently capture temporal dependencies in sequential data while maintaining low hardware complexity. We present a detailed hardware architecture for the QCLIF neuron and demonstrate its implementation in a 45nm CMOS technology. Our results show that the proposed RSNN achieves competitive accuracy on sequential learning tasks while significantly reducing hardware area and power consumption compared to existing RSNN implementations. This work paves the way for energy-efficient neuromorphic computing systems capable of processing temporal information in real-time applications.

Recommended citation: S. S. Bezugam*, Y. Wu*, J. Yoo*, D. Strukov, and B. Kim. Neuro-Inspired Computational Elements Conference 2024. https://doi.org/10.1109/NICE61972.2024.10548306

RRAM based processing-in-memory for efficient intelligent vision tasks at the edge

Published in Memories – Materials, Devices, Circuits and Systems (Elsevier), 2024

The work presents a proof-of-concept methodology for at edge visual data storage and processing-in-memory (PIM) as visual data preprocessing inspired from the biological visual system pipeline. This work proposes a methodology to improve the contrast of low-light low-contrast image by carefully modulating the conductance of memristive kind oxide-based resistive memory (RRAM) device. We present the level of contrast enhancement using conductance modulation of different non-filamentary RRAMs with different material stacks and also analyze the impact of RRAM variability on the contrast enhancement. For intelligent vision tasks, we implement artificial neural network (ANN) to perform the image classification and shows the best-case improvement of 1500 epochs (74%) using RRAM based PIM. We also implement a large sized ANN “Efficient-Det Network” to perform object recognition on low-light low-contrast dataset “Ex-Dark” to evaluate the proposed method using PIM layer. The result shows 8% higher mAP than network without a PIM layer. The present work is a step towards the development of efficient hybrid visual system for intelligent vision tasks at edge.

Recommended citation: A. Kumar and S. S. Bezugam. Memories – Materials, Devices, Circuits and Systems (Elsevier) 2024. https://doi.org/10.1016/j.memori.2024.100115

Controlling ReRAM’s Switching Characteristics with Shadow Memory for Continual Learning

Published in IEEE International Memory Workshop (IMW) 2025, 2025

We propose integrating a “shadow” memristor with a synaptic memristor to adjust switching characteristics of the latter, e.g., by scaling programming voltages using a voltage divider configuration. Such adjustment allows tightening device-to-device variations in switching behavior across a chip, an essential requirement for implementing memristor-based fast (few-shot, real-time) learning neuromorphic systems. We experimentally validated our approach on two exemplary fast learning scenarios to show that it significantly improves their performance. Additionally, we demonstrate that shadow memristors help avoid catastrophic forgetting by shifting switching threshold voltages of sensitive synaptic memristors. Therefore, the proposed approach enables two key features of continual learning.

Recommended citation: S. S. Bezugam, T. Bhattacharya, H. Petschenig, S. Choi, G. Hutchinson, G. Pedretti, X. Sheng, J. Ignowski, T. Van Vaerenbergh, R. Beausoleil, R. Legenstein, and D. Strukov. IEEE International Memory Workshop (IMW) 2025. https://doi.org/10.1109/IMW61990.2025.11026884

SpiceXpanse: A Scalable, Automated Framework for Efficient Parameter Optimization and Modeling of RRAM Circuits

Published in IEEE Nanotechnology Materials and Devices Conference (NMDC) 2025, 2025

The extraction and modeling of device parameters for resistive random-access memory (RRAM) circuits are impeded by pronounced device variability and high-dimensional parameter spaces. Conventional SPICE workflows rely on manual file manipulation, limiting scalability and reproducibility. Here, we present SpiceXpanse, an open-source framework that automates RRAM model calibration by orchestrating configurable parameter exploration, parallel HSPICE execution, and interactive visualization. The modular optimization engine supports arbitrary sampling schemes, search heuristics, and composite loss definitions, enabling physically consistent fits while maintaining full process transparency. In a benchmark involving ten experimentally fabricated passive RRAM cells, SpiceXpanse reduced calibration time from multiple weeks to several hours on commodity hardware. As a case study, we applied a shadow-memory module to estimate per-device series resistances, aligning RESET thresholds at −2 V and significantly reducing dispersion. SpiceXpanse thus provides reproducible and scalable methodologies, significantly enhancing modeling accuracy and productivity for device characterization and circuit optimization, particularly beneficial for neuromorphic and in-memory computing research.

Recommended citation: S. S. Bezugam*, S. Choi, S. Menzel, and D. B. Strukov. IEEE Nanotechnology Materials and Devices Conference (NMDC) (2025) — Accepted. https://github.com/saibez/SpiceXpanse

talks

teaching

Teaching experience 1

Undergraduate course, University 1, Department, 2014

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Teaching experience 2

Workshop, University 1, Department, 2015

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